- Motor controller
- External ADC/DAC inter-connection
- GPIO control interfaces
- I2C control interfaces
- SPI control interfaces
- UART control interfaces
- FPGA IP development
- GPIO connection pins
- I2C masters
- SPI masters
- UART interfaces
- 1GHz Quad core ARM Cortex A-7, 1Gb RAM
- 10/100 Base-T Ethernet socket
- 2 x USB 2.0 Host interfaces
General-purpose digital IO interface offering 32 IO connection pins and a 1GHz Quad core ARM Cortex A-7 Processor.
The IOI-GP-2 includes full support for the OpenIOLabs ScriptML™ protocol.
The IOI-GP-2 interfaces directly with the OpenIOLabs server via a LWM2M CoAP interface allowing for a fully scalable solution to IO inter-connectivity. The control of the IOI-GP-2 can be either from the OpenIOLabs server (local or cloud based) or via the OpenIOLabs ScriptML™ protocol that is running on the quad-core ARM processor.
The benefit of using the ScriptML™ is that full control of all of the IO interfaces can be implemented at the very edge of the network. Combining this with the fully flexible IOI-GP2 provides a very powerful tool for data acquisition and control.
All data that is collected through the IO interfaces can either be reported directly to the OpenIOLabs server, or alternatively hardware and software accelerators in the FPGA and Microblaze, respectively, can be used to pre-process the collected data before reporting the derived data to the server.
The benefit of this approach is that any numerical intensive processing tasks can be pushed to the very edge of the network relieving both the processing burden from the server as well as the load placed in the communications network.